Watchdog Timer in Embedded System

After reading this blog below questions will get solved regarding watchdog timer

1.  what is watchdog timer ?
2.  Why watchdog timer is important?
3.  How does watchdog timer works?
4.  How to use watchdog timer in embedded system?

1. Introduction:

Watchdog timer is a piece of hardware in micro-controller. Watchdog timer is used to generates system reset if system gets stuck somewhere  i.e. if system goes into endless loop of execution watchdog timer will reset the system to come out of endless loop. Watchdog is safety mechanism in embedded system which makes your system reliable, but it depends on how you make use of watchdog timer.

1.1 How does watchdog works :

Watchdog is basically a counter, which starts from counting zero and reaches to a certain value. If counter reaches to certain value then watchdog hardware will generates a watchdog reset. To avoid system reset, software needs to kick the watchdog i.e. need to reset the counter to zero. In case software stuck into endless loop it system will not able to kick the watchdog hence counter reaches to certain value and resets the system.

Watchdog is initially loaded with certain value. This value is calculated based on timeout time of watchdog (Further section it is been shown how to calculate counter value based on timeout value). Before timeout time, system should reset the counter. 

e.g. If your system if performing 3 tasks periodically and to perform 3 tasks is takes 500 ms. Then timeout time is considered as 600 ms (considering worst case scenario), counter value is calculated with respect to 600 ms and loaded into watchdog. 

Following figures shows watchdog hardware. Input to watchdog hardware is clock. Based on every clock tick watchdog internal counter increments. Then there is comparator which compares count value with loaded count value (timeout value) and if count matches watchdog hardware generates and reset signal.

Fig. 1 Watchdog timer

Fig. 2 Watchdog Working

2. Watchdog Calculations :

Consider a system in watchdog is working on 4 kHz clock. System finishes its work in 450 ms and worst case time to finish work is 500 ms. Let us consider 500 ms as timeout time. 

1/4 kHz= 0.25 ms.
1 tick of clock = 0.25 ms. 
500 ms =2000 ticks.

When clock ticks 2000 times 500 ms is completed. Counter value related to  timeout is 2000.

If watchdog counter reaches to 2000 it will generates a reset signal as per Fig 2. Before reaching to 2000 system need to reset counter to 0.

Fig 3. Clock to Watchdog

3. Watchdog Implementation:

Consider system having 3 periodic tasks as shown in below code task1, task2 and task3. To finish 3 tasks it takes 450 ms as per above discussion. So after finishing all 3 tasks software should reset (kick) watchdog counter. So that system will never get reset.

If system stuck in any one of task, it will never kick watchdog timer. Then watchdog counter will increment and once counter reaches to 2000 count (as per above calculation), watchdog hardware will generates an interrupt i.e. reset signal and system will get reset (Fig. 2).

         void main()

            {

                 while(1)

                   {

                        task1();

                        task2();

                        task3();

                        kick_wdg(); // called before 500ms

                   } //end of while

            } // end of main

Advanced use cases of watchdog timer :
In case of  operating system (multitasking system), watchdog plays an important role. Watchdog can monitor program flow, monitors how frequent a task execute (Alive Supervision). If watchdog finds outs program flow violation or task is getting executed too frequent or less frequent the watchdog reset is generated.

In case of  alive supervision each task sets an flag, indicating task in alive i.e executed. Watchdog monitor function will check whether every task has reported alive indication or not. If task misses to set an alive indication watchdog monitor function will never kick the watchdog and finally watchdog will resets system.